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roshan_Resume_IITKGP_2016

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ROSHAN MESHRAM

- Roshan Meshram is a Microelectronics and VLSI design engineer with a M.Tech from IIT Kharagpur and experience designing analog circuits and Sigma Delta ADCs. - He has expertise in analog circuit design, digital VLSI circuits, RFIC design, IC design, and low power circuits, and has experience using Cadence tools and Verilog. - His masters project involved designing a Sigma Delta ADC using a switched capacitor integrator and comparator to convert an analog input to a digital bit stream.

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1 CURRICULUM VITAE ROSHAN MESHRAM IIT Kharagpur Contact No: +91 7797437247 Microelectronics and VLSI design E-mail: meshram.roshan@hotmail.com SUMMARY Internship in analog layout design at ON semiconductor A Microelectronics and VLSI Design Engineer post-graduated from IIT Kharagpur having a year of extensive experience in designing Sigma Delta Analog to Digital Converter. Core expertise in Analog circuit design, Digital VLSI circuit, RFIC Design, IC design, Low power circuit and VLSI CAD and also having Nanotechnology. Having great experience designing high gain op-amp, Comparators, digital circuits like D latch by using Cadence Tool UMC 180nm Technology and verilog. Result Oriented, Self-Driven, Highly Motivated and hungry to learn new technologies Education Details: M.Tech. in Microelectronics and VLSI design (2015) from IIT Kharagpur with 7.39 CGPA B.E. in Electronics and Telecommunication (2011) from Sant Gadge Baba Amravati university with 61.69% marks 10+2 with maths, physics, chemistry (2006) from Pune Board(M.H.) with 52.83% marks High School (2003) from Pune Board(M.H.) with 49.86% marks Courses Taken: Analog VLSI circuits Digital VLSI circuits Semiconductor device modeling VLSI technology Architecture design of ICs Low power circuits & systems Technical Skills: Programming Language : C Design Tools & Technology : Cadence UMC 180nm, basic knowledge of Verilog, xillinx, MatLab Operating System : WINDOWS 8,XP,Red Hat Linux 9.0. Others :ISIS, LAB View, PCW PIC C compiler, Microsoft Office Extra-Curricular: PreDAC course from Sunbeam Institute of information Technology, Pune Authorized training Centre of CDAC, Pune. Won First prize in National Level Technical Festival (project competition) at GCOE Amravati. Won First prize in project competition at Jawaharlal Darda Institute of Engg. & Tech,Yavatmal. Participated in workshop on Foundation of VLSI-Programmable Logic using Cpld.
2 Projects Detail: 1- Design And Simulation of Sigma Delta Modulator [IIT Kharagpur, West Bengal, INDIA ] Duration: May 2014 May 2015 Team Size:1 Role Played: Designer, Developer and Tester Tool used: Cadence UMC 180nm technology, Verilog, Matlab. Masters project completed on Design and Simulation of Sigma Delta ADC under guidance of Dr.Pradip Mandal. The aim of this project to get the output in density digital bit stream of according analog input. In this project I had designed Opamp with the 58 dB gain at 55MHz UGB for 2pf load capacitor for making switched capacitor integrator. Integrator makes the input small signal into amplified sample and hold signal. The comparator contain pre-amplifier cascade with decision making circuit and self-biased amplifier to make output in pulses. The output is available in 0-1.8v to convert it into logic levels D Flip Flop is designed. Decimation filter designed in verilog along with DAC. By integrating all the above blocks in the same chip we intend to address the challenge of extracting of digital signal from weak analog signal, which has large dc offsets and common mode interference, and make it suitable for further digital processing. 2- GSM Based Godown Security and Operation System[S.G.B. Amravati University, MH, INDIA] Duration: July 2010- June 2011 Team Size: 4 Role Played: Circuit designer, microcontroller programming. This was small but very useful project for grains godown for protect the damage of grains against worst condition of nature. The aim of the system is to develop innovative solution and tool in area of godown security and control. The task of this project is to take data from sensor which contain humidity sensor, temp. Sensor, sound sensor, processes it by using PIC16F877A microcontroller & takes action by using small GUI developed in VB as per data. And inform to the owner of godown by using SMS sent by GSM module. Mini projects done in courses: Designed a Two stage miller compensated op-amp with high gain and reasonable bandwidth in cadence. Simple traffic light controller using LAB View, and also in ISIS for PIC microcontroller. 8bit adder by using D Flip Flop and adder IC. Strengths: Enthusiasm and Ability to Learn Co-operative Self-Motivated
3 Personal Detail: Date of Birth : 21th Jul. 1988 Fathers Name : Mr. Ramesh Mothers Name : Mrs. Nalini Languages known : English, Hindi & Marathi. Gender : Male Nationality : INDIAN Marital Status : Single Declaration: I hereby declare that the details furnished above are true and correct to the best of my knowledge and belief. Date: Place:Bangalore (Roshan R. Meshram)

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roshan_Resume_IITKGP_2016

  • 1. 1 CURRICULUM VITAE ROSHAN MESHRAM IIT Kharagpur Contact No: +91 7797437247 Microelectronics and VLSI design E-mail: meshram.roshan@hotmail.com SUMMARY Internship in analog layout design at ON semiconductor A Microelectronics and VLSI Design Engineer post-graduated from IIT Kharagpur having a year of extensive experience in designing Sigma Delta Analog to Digital Converter. Core expertise in Analog circuit design, Digital VLSI circuit, RFIC Design, IC design, Low power circuit and VLSI CAD and also having Nanotechnology. Having great experience designing high gain op-amp, Comparators, digital circuits like D latch by using Cadence Tool UMC 180nm Technology and verilog. Result Oriented, Self-Driven, Highly Motivated and hungry to learn new technologies Education Details: M.Tech. in Microelectronics and VLSI design (2015) from IIT Kharagpur with 7.39 CGPA B.E. in Electronics and Telecommunication (2011) from Sant Gadge Baba Amravati university with 61.69% marks 10+2 with maths, physics, chemistry (2006) from Pune Board(M.H.) with 52.83% marks High School (2003) from Pune Board(M.H.) with 49.86% marks Courses Taken: Analog VLSI circuits Digital VLSI circuits Semiconductor device modeling VLSI technology Architecture design of ICs Low power circuits & systems Technical Skills: Programming Language : C Design Tools & Technology : Cadence UMC 180nm, basic knowledge of Verilog, xillinx, MatLab Operating System : WINDOWS 8,XP,Red Hat Linux 9.0. Others :ISIS, LAB View, PCW PIC C compiler, Microsoft Office Extra-Curricular: PreDAC course from Sunbeam Institute of information Technology, Pune Authorized training Centre of CDAC, Pune. Won First prize in National Level Technical Festival (project competition) at GCOE Amravati. Won First prize in project competition at Jawaharlal Darda Institute of Engg. & Tech,Yavatmal. Participated in workshop on Foundation of VLSI-Programmable Logic using Cpld.
  • 2. 2 Projects Detail: 1- Design And Simulation of Sigma Delta Modulator [IIT Kharagpur, West Bengal, INDIA ] Duration: May 2014 May 2015 Team Size:1 Role Played: Designer, Developer and Tester Tool used: Cadence UMC 180nm technology, Verilog, Matlab. Masters project completed on Design and Simulation of Sigma Delta ADC under guidance of Dr.Pradip Mandal. The aim of this project to get the output in density digital bit stream of according analog input. In this project I had designed Opamp with the 58 dB gain at 55MHz UGB for 2pf load capacitor for making switched capacitor integrator. Integrator makes the input small signal into amplified sample and hold signal. The comparator contain pre-amplifier cascade with decision making circuit and self-biased amplifier to make output in pulses. The output is available in 0-1.8v to convert it into logic levels D Flip Flop is designed. Decimation filter designed in verilog along with DAC. By integrating all the above blocks in the same chip we intend to address the challenge of extracting of digital signal from weak analog signal, which has large dc offsets and common mode interference, and make it suitable for further digital processing. 2- GSM Based Godown Security and Operation System[S.G.B. Amravati University, MH, INDIA] Duration: July 2010- June 2011 Team Size: 4 Role Played: Circuit designer, microcontroller programming. This was small but very useful project for grains godown for protect the damage of grains against worst condition of nature. The aim of the system is to develop innovative solution and tool in area of godown security and control. The task of this project is to take data from sensor which contain humidity sensor, temp. Sensor, sound sensor, processes it by using PIC16F877A microcontroller & takes action by using small GUI developed in VB as per data. And inform to the owner of godown by using SMS sent by GSM module. Mini projects done in courses: Designed a Two stage miller compensated op-amp with high gain and reasonable bandwidth in cadence. Simple traffic light controller using LAB View, and also in ISIS for PIC microcontroller. 8bit adder by using D Flip Flop and adder IC. Strengths: Enthusiasm and Ability to Learn Co-operative Self-Motivated
  • 3. 3 Personal Detail: Date of Birth : 21th Jul. 1988 Fathers Name : Mr. Ramesh Mothers Name : Mrs. Nalini Languages known : English, Hindi & Marathi. Gender : Male Nationality : INDIAN Marital Status : Single Declaration: I hereby declare that the details furnished above are true and correct to the best of my knowledge and belief. Date: Place:Bangalore (Roshan R. Meshram)