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The look up table (LUT)

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Basel Mansour

The document discusses look-up tables (LUTs) and how they can be implemented using memory. A LUT stores an output for each combination of inputs. A memory LUT uses addresses as inputs to access stored data outputs. One example shows a memory LUT that produces a repetitive waveform by storing signal forms in memory locations and extracting the sequence from successive locations each clock cycle. Another example circuit uses an EPROM, counter, and gates to address EPROM locations cyclically to output control signals from the stored data on a repeating five-cycle basis.

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The look Up Table (LUT) For every combination of the input, there is a combination of the output. The LUT can be a combinational logic circuit, or a programmed memory.
The Memory LUT In the case of a memory LUT, the address represents the input, and the data stored in the addressed memory location represents the output. The application of the address to the memory accompanied with a read signal causes the memory to output the data on the data bus, which can be used as control signals, or an input to other circuits.
Producing a repetitive waveform The required form of the signals [S3-S0] are stored in five memory locations ( location 0 to location 4) as [D3-D0]. The sequence of these signal forms is extracted from successive memory location with each clock cycle.
A programmed Memory LUT Circuit The circuit is composed of an EPROM, a 3-bit counter, a NAND gate, and two switches. The push button clears the counter. When the button is released, the output of the NAND gate (logic 1) enables the count and disables the Clear, and the count (C2-C0) is increased with the rising edge of each clock cycle, i.e., the next memory location is addressed.
The EPROM LUT; Continue * So, with each new clock cycle, a new memory location is addressed and its contents are output on the data bus to be used as control signals [S3-S0]. When the count reaches 5Hex (101 binary), the output of the NAND gate becomes logic 0. This clears the counter to start again. So the form is repeated every five clock cycles.

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The look up table (LUT)

  • 1. The look Up Table (LUT) For every combination of the input, there is a combination of the output. The LUT can be a combinational logic circuit, or a programmed memory.
  • 2. The Memory LUT In the case of a memory LUT, the address represents the input, and the data stored in the addressed memory location represents the output. The application of the address to the memory accompanied with a read signal causes the memory to output the data on the data bus, which can be used as control signals, or an input to other circuits.
  • 3. Producing a repetitive waveform The required form of the signals [S3-S0] are stored in five memory locations ( location 0 to location 4) as [D3-D0]. The sequence of these signal forms is extracted from successive memory location with each clock cycle.
  • 4. A programmed Memory LUT Circuit The circuit is composed of an EPROM, a 3-bit counter, a NAND gate, and two switches. The push button clears the counter. When the button is released, the output of the NAND gate (logic 1) enables the count and disables the Clear, and the count (C2-C0) is increased with the rising edge of each clock cycle, i.e., the next memory location is addressed.
  • 5. The EPROM LUT; Continue * So, with each new clock cycle, a new memory location is addressed and its contents are output on the data bus to be used as control signals [S3-S0]. When the count reaches 5Hex (101 binary), the output of the NAND gate becomes logic 0. This clears the counter to start again. So the form is repeated every five clock cycles.