Using MDE for the Formal Verification of Embedded Systems Modeled by UML Sequence Diagrams
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This document discusses using model driven engineering (MDE) to formally verify embedded systems modeled with UML sequence diagrams. It presents an internal application metamodel (IAM) and labeled timed automata (LTA) metamodel to transform UML models, and uses the UPPAAL model checker to verify properties. The approach is demonstrated with a case study, and future work is outlined to improve automation and integration with other design tools.
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Embedded systems are application-specific systems that contain both hardware and software tailored for a particular task. Good hardware/software codesign involves representing the system functionality using unified models that can be partitioned between hardware and software implementations. There are various partitioning algorithms that aim to optimize metrics like performance, cost and power consumption by assigning functional objects to either hardware or software components. The choice of modeling language and partitioning approach depends on the application and design constraints.Final Jspring2009 Mda Slimmer Ontwikkelen Van Java Ee Applicaties
Final Jspring2009 Mda Slimmer Ontwikkelen Van Java Ee ApplicatiesMinistry of Foreign Affairs, Netherlands
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Using MDE for the Formal Verification of Embedded Systems Modeled by UML Sequence Diagrams
- 1. Using MDE for the Formal Verification of Embedded Systems Modeled by UML Sequence Diagrams Francisco A. M. Nascimento Marcio F. S. Oliveira Fl叩vio R. Wagner SBCCI 2009 Natal, RN
- 2. Motivation To cope with the growing complexity of embedded systems design Higher levels of abstraction Exhaustive test of all possible system executions is an impractical or even impossible task Formal verification methods and tools as a promising approach
- 3. Summary Model Driven Engineering (MDE) MDE-based Formal Verification Internal Application Metamodel IAM LTA Metamodel - LTA Transforming UML into IAM+LTA Case Study Conclusion and Future Work
- 4. Model Driven Engineering Main artifacts to be constructed and maintained are models Languages used to express models are defined by means of meta- models Software development consists of transforming a model into another one until a final model is obtained that is ready to be executed
- 6. UML model Class diagrams (CD) Application components Hierarchy and modularity Structure Sequence diagrams (SD) Possible executions of the application A root SD specifies how the executions are composed Behavior
- 7. Example: UML model UML model: class diagram
- 8. Example: UML model UML model: main sequence diagram
- 9. Example: UML model UML model: sequence diagrams
- 10. Example: UML model UML model: sequence diagrams
- 11. Example: UML model UML model: sequence diagrams
- 12. Internal Application Metamodel Structure
- 13. Example Internal Application Model
- 14. Internal Application Metamodel Behavior
- 15. Example Internal Application Model
- 16. Example: InteractionGraphs Internal Application Model
- 17. Internal Application Metamodel Labeled Timed Automata
- 18. Example Internal Application Model
- 19. Transforming UML into IAM+LTA Set of transformations between models implemented using Xtend language from openArchitectureWare framework Xtext language for IAM+LTA parser/editor implementation Xpand language used to generate textual input for Uppaal Eclipse Modeling Framework EMF
- 20. Model Checking using UPPAAL
- 21. Future Work Automatic generation of properties to be proved by model checking Integration with diferent co-design and co-synthesis tools More experiments to explore the effectivity of the methodology
- 22. Conclusions Transformation between models is used to generate an internal representation model IAM+LTA is adequate to be used by formal verification behavior and structure control/data flow of execution timed automata model