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VIJAY KOLLURI
Mobile: +91-9618418413 / Email: vijaykolluri777@gmail.com
Career Objective:
To be in a respectable position where I would be instrumental to the growth of the organization.
I am confident enough to give my best to the work assigned to me. I would like to take up new challenges
to prove myself and become a person to be inspired from.
Education:
 Graduated (2015) (Electronics and Communication Engineering) from S.R. Engineering
College affiliated to JNTUH. (With an aggregate of 72%).
 Pre-Graduation-MPC (2011) from RD Junior College affiliated to Board of Intermediate-AP.
(With an aggregate of 88.3%).
 SSC (2009) from Platinum Jubilee High School-Board of Secondary Education-AP. (With an
aggregate of 87.3%)
Experience:
 Trained (ASIC Design and Verification) from e2i Pro Bangalore.
Technical Skills:
 Languages : System Verilog, Verilog, C.
 Methodologies : UVM(Universal Verification Methodology)
 Tools : Questa sim
Projects:
Project 1:
Title : Developed AMBA APB 3 VIP.
Description : The APB is part of the AMBA protocol family. It provides a low-cost interface that
is optimized for minimal power consumption and reduced interface complexity. The APB interfaces
to any peripherals that are low-bandwidth and do not require the high performanceof a pipelined bus
interface.
Tool : Questa sim 10.2c.
Methodology : UVM (Universal Verification Methodology)
Responsibilities:
 Understanding the specification.
 Architected the class based verification environment using UVM.
 Generated Functional coverage.
 Performed different test cases.
Project 2:
Title : Packet Divider
Description : The packet divider and reorder logic processes the packet based on the control
information. It divides and reorders the packet information based on the control register settings.
Tool : Questa sim 10.2c.
Methodology : UVM (Universal Verification Methodology)
Responsibilities:
 Understanding the specification.
 Developed reusable verification components.
 Created different test cases.
 Developed Functional coverage.

Project 3:
Title : Vending Machine
Description : Vending machine is a machine which dispenses products of food and beverages to the
customers automatically after the customer inserts the currency into machine and returns the balance
amount if any.
Tool : Questa sim 10.2c
Language : Verilog
Responsibilities:
 Verified the VMC using Verilog HDL.
Academic Project:
Major Project Details:
Title : Automatic Toll Tax Payment System Using RFI
Description : ATCS is an Automated Toll Collection System used for collecting tax
automatically. In this we do the identification with the help of radio frequency. A vehicle will hold an
RFID tag. This tag is nothing but unique identification number assigned. This will be assigned by RTO
or traffic governing authority. In accordance with this number we will store, all basic information as
well as the amount he has paid in advance for the TOLL collection. Reader will be strategically placed
at toll collection center.
Activities:
 Student coordinator of the national level cultural event SPARKRILL’14 during the academic
year 2014.
 Organized “Techno Trends X3” a National level Technical Fest at our College.
 Attended a workshop on “MICROSOFT TECHNOLOGY” conducted Micro soft community
at Warangal on 3rd
March 2012.
 Attended a workshop on “Ideas to Execution for Entrepreneurs” An initiative by IIT Delhi
Entrepreneurship Development Cell conducted by Vishishth’12 & Nurture Talent Academy
hosted by S.R. Engineering College.
 Member of Institution of Electronics and Telecommunication Engineers(IETE)
Strengths:
 Logical solving ability
 Quick analyst
 Ability to withstand pressure
 Good team player with active participation
 Punctual and committed
Personal Profile:
Name : Vijay kolluri
Father’s Name : Samuel
Marital Status : Single
Date of Birth : 31-03-1993
Nationality : Indian
Languages known : English, Hindi, Telugu
Address : #20/4-2, Gurukrupa, 17th cross, 5th main, 6th sector, Raghiv Gandhi nagar,
HSR Layout, Bangalore

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