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VLSI IMPLIMENTATION OF A COST-EFFICIENT
NEAR-LOSSLESS CFA IMAGE COMPRESSOR FOR
WIRELESS CAPSULE ENDOSCOPY
GUIDED BY
LAIJU P JOY
ASSISTANT PROFFESSOR
DEPT. OF EC
GEC, IDUKKI
PRESENTED BY
SHAFEEK BASHEER
ROLL No. 15
M1 VLSI & ES
GEC, IDUKKI
08-12-2017 GOVERNMENT ENGINEERING COLLEGE IDUKKI 1

OVERVIEW
• INTRODUCTION
• NEAR-LOSSLESS IMAGE COMPRESSION ALGORITHM
 PIXEL RESTORATION
 PREDICTION
 RUN MODE MODULE
 MODIFIED GOLOMB-RICE CODING
 ENTROPY CODING PROCESS
 DECODING PROCESS
 RUN MODE DECODER
• VLSI ARCHITECTURE
• SIMULATION RESULTS AND CHIP IMPLEMENTATION
• CONCLUSION
• REFERENCES

INTRODUCTION
• Provides an efficient way to examine the digestive tract of patients with
gastrointestinal diseases.
• System includes
CMOS ( Complementary Metal Oxide Semiconductor) image sensor
 Microcontroller
 RF ( Radio Frequency) transmitter
Image compressor
Micro odometer

CONTD…
• FCC ( Federal Communication Commission ) limited the frequency of any
medical implant wireless communication system to not more than 402-405
MHz to reduce power dissipation
• High quality and high performance image compression algorithm is
necessary for wireless capsule endoscopy
• JPEG LS has high performance and high compression rate

NEAR-LOSSLESS IMAGE COMPRESSION ALGORITHM

PIXEL RESTORATION
• Each pixel in a colour image is composed of three colours : red, green, blue
• CMOS image sensor captures images by a Colour Filter Array ( CFA )
technique.
• Each pixel in a captured image contains only one colour

Fig. 2. Restoring image from the CFA format to RGB line buffers.

PIXEL RESTORATION
• Number of pixels in CFA image is only 1/3rd of a general full RGB colour
image
• Arrange the pixels in CFA image to a colour continuous format
• Needs line buffer only till the CFA image width

PREDICTION
• Pixel won’t pass through median edge detector if selected in run mode
• Here the prediction model is moved to the front of the run mode avoiding
wastage of too many bits
• Uses surrounding pixel to predict current pixel

PREDICTION
• If correlation of surrounding pixels is high, the compression rate increases

PREDICTION
• Blue and Red passes the edge detector using the equation
xmed(R,B) = 2*(a+b+d)/4, c ≧ max(a,b) or c < min(a,b)
xmed(R,B) = 4*(a+3)*(b+d)/8, others
• Predicted value of the current pixel x would be obtained by an average filter is
given by
xmed(G) = (3*a)+(3*b)+(2*d)/8

RUN MODE MODULE
• Constructed by run length table and an encoder
• ‘NEAR’ is the parameter used to set quality and compression rate
• predicted error value ‘errval’ is given as
(errval+NEAR) / (2*NEAR) if errval ≥ NEAR+1
-(NEAR – errval) / (2*NEAR) else if errval ≤ - NEAR -1
run mode processing else

MODIFIED GOLOMB-RICE CODING
• Normal Golomb-Rice coding requires more than 24 bits to express 8 pixels
• Coding parameter k is adjusted according to the previous context table
values
• Normal algorithm is modified by fixing coding parameter to 2

MODIFIED GOLOMB-RICE CODING
• Modified Golomb-Rice algorithm does not use quantization near the array
boundaries
• Modified Golomb-Rice coding was used as we compress CFA images and
not RGB images

ENTROPY CODING PROCESS
• Three entropy modes used
 Run Mode
 Boundary
 Modified Golomb-Rice Coding
• Run mode module first encode the error values
• Boundary mode encodes the values from Run Mode module
• Modified Golomb-Rice coding encodes the error values according to
Boundary information

• DECODING PROCESS
• It is necessary to decode the encoded bit stream from the proposed near
lossless compression algorithm
• Main decoding components are
Run Mode decoder
Boundary module
MGR decoder
Prediction decoder
Pixel restoration recover

RUN MODE DECODER
• Decode the run mode information
• Bits of the bitstream are read one by one until finding the first “0”
• Counting number of “1” indicates position in the J table

VLSI ARCHITECTURE

CONTD…
• Composed of four main parts
Pixel restoration module
Predictor
Entropy coder
Barrel shifter
• Register bank was added to provide four neighbouring pixels
• Connected with two line buffer memory

CONTD…
• Four stage pipeline architecture used to improve performance
• Finite State Machine ( FSM ) used to realise controller
• Barrel shifter used to packet output bitstream in a fixed length

VLSI ARCHITECTURE
PIXEL RESTORATION CIRCUIT
• Designed to produce memory addresses and read values of target pixels
• Constructs an integrated image for prediction
• Includes boundary detector to find boundary information

VLSI ARCHTECTURE
PREDICTOR AND RUN MODE CIRCUIT
• Predict the value of current pixel according to the neighbouring pixel
• Consist of two circuits
Reconstructed pixel module
Run counter
• Run counter designed to count the number of errvals entering run mode
module

VLSI ARCHTECTURE
PREDICTOR AND RUN MODE CIRCUIT
• FSM produces a control signal Rx_mode to select one errval and run count
values sent to the entropy encoder

VLSI ARCHITECTURE
ENTROPY CODER
• Composed of run length coder and MGR coder
• Run length coder includes
Run code table
First coder
Second coder

VLSI ARCHITECTURE
ENTROPY CODER
• If values of errvals is over range, it is coded by MGR coder

VLSI ARCHITECTURE
BARREL SHIFTER
• Collects the codes according to various lengths and produce fixed length
output
• Code buffer composed of 40 bit register
• Consist of
Three shifters
Three adders
Registers
Multiplexers

SIMULATION RESULTS AND CHIP IMPLEMENTATIONS
• MATLAB tool was used to simulate the near lossless algorithm
Fig. 13. Chip photomicrograph by 90-nm CMOS process.

CONCLUSION
• The compression performance of the proposed algorithm can be improve
• VLSI architecture of this owns the benefits of
 low cost,
 low memory demand,
 high performance
 high quality

REFERENCES
• A. Karargyirs and A. Koulaouzidis, “OdoCapsule: next-generation wireless capsule endoscopy with accurate
lesion localization and video stabilization capabilities,” IEEE Transactions on Biomedical Engineering, vol. 62,
no. 1, Jan. 2015.
• P. Merlino and A. Abramo, “A fully pipelined architecture for the LOCO-I compression algorithm,”
IEEE Transactions on VLSI Systems, vol. 17, no. 7, Jul. 2009.
• K. Sarawadekar, and S. Banerjee, “An efficient pass-parallel architecture for embedded block coder in JPEG
2000,” IEEE Transaction on Circuits and Systems for Video Technology, Vol. 21, no. 6, pp. 825-836, Jun. 2011.
• D. T. Vo, and T. Q. Nguyen, “Quality enhancement for motion JPEG using temporal redundancies,” IEEE
Transaction on Circuits and Systems for Video Technology, Vol. 18, no. 5, pp. 609-619, May. 2008.
• C. P. Fan, C. W. Chang, and S. J. Hsu, “Cost-effective hardware-sharing design of fast algorithm based multiple
forward and inverse transforms for H. 264/AVC, MPEG-1/2/4, AVS, and VC-1 video encoding and decoding
applications,” IEEE Transaction on Circuits and Systems for Video Technology, Vol. 24, no. 4, pp. 714-720, Apr.
2014.

ANY QUERIES…

THANK YOU….

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Vlsi implimentation of a cost efficient near-lossless cfa image compression for wireless capsule endoscopy

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Vlsi implimentation of a cost efficient near-lossless cfa image compression for wireless capsule endoscopy