Professional Experience:
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Started my career with generation of gate level netlist from RTL using DC compiler and from gate level netlist to GDS-II flow using IC-compiler by understanding the flow. Worked in a performance team and supported them by writing perf-checker rules in C and perl wrappers on top of them. Understood bits and pieces in the performance modelling.
Right now working in the Performance Analysis and Benchmarking team in the Processor Division as System Performance Analysis Engineer. In this position, I will be focusing on the performance measurement and analysis of multi-cluster-CPU and CPU-memory paths. Responsible for collaborating with the experts...
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