狠狠撸

San Francisco Bay Area United States

Computer architecture and VLSI

Pursuing Masters in Electrical Engineering with focus on VLSI Design and Computer Architecture Worked on Physical Design of multi-million gate complex blocks in 16 FinFet Technology Experience in Floor Planning - Placement - Clock-tree Synthesis - Routing - Design Verification Static Timing Analysis - ECO fixing - Power Analysis (Static and Dynamic IR Drop) Proficient knowledge in scripting in TCL Expertise in EDA tools: Physical Design tools - Synopsys ICC & Cadence EDI Full custom tools - Cadence Virtuoso Layout Editor Extraction - Synopsys Star-RC(Coupled & Lumped) Timing Analysis - Primetime, Primetime Signal Integrity Physical Verification - Calibre DR...