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San Francisco Bay Area United States

Experienced Verification Engineer

Electronics / Computer Hardware

Professional with 9 years experience in VLSI front end verification and scripting. Experience in IP and SOC level verification. Experience in writing system verilog assertions. Expertise: HDL/HVLs:Verilog,System Verilog(SV) Methodologies:UVM,OVM and VMM Programming Languages:C and C++ Scripting Languages:UNIX shell and PERL Protocols:AMBA APB,AHB Knowledge of VHDL,Ethernet MAC PCS subsytems,Functional coverage,AMBA AXI,TCL,synthesis and backend flow.