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Hyderabad Area, India India

Custom Layout Design Engineer at Institute of Silicon Systems

Electronics / Computer Hardware

• Custom Layout Design Engineer with a Gamut of Experience in Designing Standard cells, I/O Cell, Analog and Mixed Signal Circuit Layouts in Cadence tools. • I have experience in Floor planning, Power Routing, Placement, schematic Driven Layout, Schematic to Layout Verification (LVS&DRC). Creates bottoms up element of chip layout including Transistor,Cell and Block Level Custom Layout. • Knowledge of CMOS process technology and various layout techniques like Inter Digitization Matching, Common Centroid Matching, Matching with respect to PVT and Shielding. • Knowledge of various layout dependent effects like antenna violation, EM violation, Latch-up, IR dro