飪� Having hands on experience in VLSI ASIC PnR Flow.
飪� Team Member in IC Compiler PnR Flow Development. Concentrated on CTS stage.
飪� Expertise in FloorPlan, CTS, Timing Closure & ECO Flow and Worked on MMMC Designs.
飪� Worked as team member in ACT (Advance Chip Builder Tool) Automation flow development & Developed Automation Flow for IC Compiler PnR Flow.
飪� Good Knowledge in scripting languages like shell, PERL, TCL & MAKE.
飪� Expertise in using Cadence Encounter, Synopsys IC Compiler & Prime Time tools.
飪� Basic Knowledge in Low Power Design Flow.
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