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Combinational Circuits encoders and decoders

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The document discusses digital logic design, specifically focusing on combinational circuits such as decoders, encoders, multiplexers, and demultiplexers. It explains the function of decoders in converting binary input codes to unique output codes and provides details on various types of decoders with examples. Additionally, it covers encoding processes, describing the role of encoders in generating binary representations from input values.

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COE 202: Digital Logic Design Combinational Circuits Part 3 KFUPM Courtesy of Dr. Ahmad Almulhem
Objectives Decoders Encoders Multiplexers DeMultiplexers KFUPM
Functional Blocks Digital systems consists of many components (blocks) Useful blocks needed in many designs Arithmetic blocks Decoders Encoders Multiplexers KFUPM iPhone motherboard (torontophonerepair.com)
Functional Blocks Digital systems consists of many components (blocks) Useful blocks needed in many designs Arithmetic blocks Decoders Encoders Multiplexers KFUPM iPhone motherboard (torontophonerepair.com) Examples of MSI devices
Decoder Information is represented by binary codes Decoding - the conversion of an n-bit input code to an m-bit output code with n <= m <= 2n such that each valid code word produces a unique output code Circuits that perform decoding are called decoders A decoder is a minterm generator KFUPM . . . . n inputs 2n outputs n-to-2n Decoder
Decoder (Uses) Decode a 3-bit op-codes: Home automation: KFUPM 3-to-8 Decoder Add Sub And Xor Not Load Store Jump op0 op1 op2 2-to-4 Decoder Light A/C Door Light-A/C C0 C1 Load a Add b Store c . .
Decoder with Enable KFUPM A decoder can have an additional input signal called the enable which enables or disables the output generated by the decoder . . . 2n outputs n-to-2n Decoder Enable bit . n inputs
2-to-4 Decoder A 2-to-4 Decoder 2 inputs (A1, A0) 22 = 4 outputs (D3, D2, D1, D0) KFUPM
2-to-4 Decoder A 2-to-4 Decoder 2 inputs (A1, A0) 22 = 4 outputs (D3, D2, D1, D0) Truth Table A1 A0 D0 D1 D2 D3 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1 KFUPM
2-to-4 Decoder A 2-to-4 Decoder 2 inputs (A1, A0) 22 = 4 outputs (D3, D2, D1, D0) Truth Table A1 A0 D0 D1 D2 D3 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1 Src: Manos book KFUPM
2-to-4 Decoder with Enable KFUPM EN A1 A0 D0 D1 D2 D3 0 X X 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 Truth Table
2-to-4 Decoder with Enable KFUPM EN A1 A0 D0 D1 D2 D3 0 X X 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 Src: Manos book Truth Table
3-to-8 Decoder KFUPM 3-to-8 Decoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2
3-to-8 Decoder KFUPM A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0 0 1 3-to-8 Decoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2
3-to-8 Decoder KFUPM 3-to-8 Decoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2
3-to-8 Decoder (using 2 2-to-4 decoders) KFUPM 3-to-8 Decoder 2-to-4 Decoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 2-to-4 Decoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A0 A1 A2 E E
Decoder-Based Combinational Circuits A Decoder generates all the minterms A boolean function can be expressed as a sum of minterms Any boolean function can be implemented using a decoder and an OR gate. Note: The Boolean function must be represented as minterms (not minimized form) KFUPM
Decoder-Based Combinational Circuits (Example) KFUPM X Y Z C S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 S = m (1,2,4,7) C = m (3,5,6,7) 3 inputs and 8 possible minterms 3-to-8 decoder can be used for implementing this circuit
Decoder-Based Combinational Circuits (Example) KFUPM Src: Manos book X Y Z C S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 S = m (1,2,4,7) C = m (3,5,6,7) 3 inputs and 8 possible minterms 3-to-8 decoder can be used for implementing this circuit
Decoder-Based Combinational Circuits (Summary) Good if: Many output functions with same inputs Each output has few minterms Hint: Check if the function complement has fewer minterms and use NOR instead of OR. KFUPM
Encoder Encoding - the opposite of decoding - the conversion of an m-bit input code to a n-bit output code with n 贈 m 贈 2n such that each valid code word produces a unique output code Circuits that perform encoding are called encoders An encoder has 2n (or fewer) input lines and n output lines which generate the binary code corresponding to the input values Typically, an encoder converts a code containing exactly one bit that is 1 to a binary code corresponding to the position in which the 1 appears. . . . . n outputs 2n inputs 2n -to-n Encoder KFUPM
8-to-3 Encoder Description: 23 = 8 inputs, 3 outputs one input =1, others = 0s Each input generate unique binary code KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2
8-to-3 Encoder (truth table) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1
8-to-3 Encoder (truth table) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 1 0 0 0 0 0 0 0 0 0 0 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1
8-to-3 Encoder (truth table) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 0 1 0 0 0 0 0 0 1 0 0 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1
8-to-3 Encoder (truth table) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 0 0 0 0 0 1 0 0 1 0 1 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1
8-to-3 Encoder (truth table) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 0 0 0 0 0 0 0 1 1 1 1 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1
8-to-3 Encoder (equations) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 Note: This truth table is not complete! Why? Output equations: A0 = ? A1 = ? A2 = ?
8-to-3 Encoder (equations) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 Output equations: A0 = D1 + D3 + D5 + D7 A1 = ? A2 = ?
8-to-3 Encoder (equations) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 Output equations: A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = ?
8-to-3 Encoder (equations) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 Output equations: A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = D4 + D5 + D6 + D7
8-to-3 Encoder (circuit) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 Output equations: A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = D4 + D5 + D6 + D7 A0 A1 A2 D1 D3 D5 D7 D2 D3 D6 D7 D4 D5 D6 D7
8-to-3 Encoder (limitations) KFUPM Output equations: A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = D4 + D5 + D6 + D7 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 Two Limitations: 1. Two or more inputs = 1 Example: D3 = D6 = 1 A2A1A0 = 111 2. All inputs = 0 Same as D0 =1
Priority Encoder Address the previous two limitations 1. Two or more inputs = 1 Consider the bit with highest priority 2. All inputs = 0 Add another output v to indicate this combination KFUPM
4-to-2 Priority Encoder KFUPM Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1s take highest priority
4-to-2 Priority Encoder KFUPM inputs outputs D3 D2 D1 D0 A1 A0 V 0 0 0 0 X X 0 0 0 0 1 0 0 1 0 0 1 X 0 1 1 0 1 X X 1 0 1 1 X X X 1 1 1 Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1s take highest priority This is a condensed truth table! It has only 5 rows instead of 16! Row 3 = 2 combinations Row 4 = 4 combinations Row 5 = 8 combinations
4-to-2 Priority Encoder KFUPM inputs outputs D3 D2 D1 D0 A1 A0 V 0 0 0 0 X X 0 0 0 0 1 0 0 1 0 0 1 X 0 1 1 0 1 X X 1 0 1 1 X X X 1 1 1 Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1s take highest priority
4-to-2 Priority Encoder KFUPM inputs outputs D3 D2 D1 D0 A1 A0 V 0 0 0 0 X X 0 0 0 0 1 0 0 1 0 0 1 X 0 1 1 0 1 X X 1 0 1 1 X X X 1 1 1 Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1s take highest priority Equations: A0 = D3 + D1 D2 A1 = D2 + D3 V = D0 + D1 + D2 + D3
4-to-2 Priority Encoder KFUPM inputs outputs D3 D2 D1 D0 A1 A0 V 0 0 0 0 X X 0 0 0 0 1 0 0 1 0 0 1 X 0 1 1 0 1 X X 1 0 1 1 X X X 1 1 1 Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1s take highest priority Equations: A0 = D3 + D1 D2 A1 = D2 + D3 V = D0 + D1 + D2 + D3
Multiplexers A combinational circuit Has a single output Directs one of 2n input to the output Choosing which input is done using n select lines KFUPM 2n inputs n select lines one output 2n x 1 MUX
2x1 MUX A 2x1 multiplexer (MUX) has 2 inputs, 1 output and 1 select line Y=D0 for S0=0, and Y=D1 for S0=1 Minimizing will result in: Y = S0.D0 + S0.D1 Exercise: Draw the circuit? KFUPM S0 D0 D1 Y 2x1 MUX
2x1 MUX A 2x1 multiplexer (MUX) has 2 inputs, 1 output and 1 select line Y=D0 for S0=0, and Y=D1 for S0=1 Minimizing will result in: Y = S0.D0 + S0.D1 Exercise: Draw the circuit? KFUPM S0 D0 D1 Y 2x1 MUX
4x1 MUX A 4x1 MUX has 4 input lines (D0, D1, D2, D3) , 1 output Y, and 2 Select Lines (S0, S1) The output for different select values is defined as: S0S1 = 00, Y = D0 S0S1 = 01, Y = D1 S0S1 = 10, Y = D2 S0S1 = 11, Y = D3 Y = S1S0D0 + S1S0D1 + S1S0D2 + S1S0D3 The output Y depends on the minterms of the Select lines Exercise: Draw the circuit? KFUPM S1 S0 D0 D1 D2 D3 Y 4x1 MUX
4x1 MUX A 4x1 MUX has 4 input lines (D0, D1, D2, D3) , 1 output Y, and 2 Select Lines (S0, S1) The output for different select values is defined as: S0S1 = 00, Y = D0 S0S1 = 01, Y = D1 S0S1 = 10, Y = D2 S0S1 = 11, Y = D3 Y = S1S0D0 + S1S0D1 + S1S0D2 + S1S0D3 The output Y depends on the minterms of the Select lines Exercise: Draw the circuit? KFUPM S1 S0 D0 D1 D2 D3 Y 4x1 MUX
Quad 2x1 MUX A MUX for two 4-bit numbers. Has a 4-bit output and a single select line Y = A If S0 = 0 Y = B if S0 = 1 KFUPM S0 A0 A1 A2 A3 B0 B1 B2 B3 Y0 Y1 Y2 Y3 QUAD 2X1 MUX
Quad 2x1 MUX Can be built using four 2x1 MUXes KFUPM S0 A0 B0 Y0 2x1 MUX S0 A2 B2 Y2 2x1 MUX S0 A1 B1 Y1 2x1 MUX S0 A3 B3 Y3 2x1 MUX
MUX-based Design A MUX can be used to implement any function expressed using its minterms Example: Implement F(A,B,C)=(1,2,6,7) using MUXes Solution1: We can use a MUX with the number of select lines equal to the number of input variables of the function. Since this function has 3 input variables, it will require 3 select lines, i.e. an 8x1 MUX KFUPM
MUX-based Design (n-Select lines) KFUPM F(A,B,C)=(1,2,6,7) A B C F 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1
MUX-based Design (n-Select lines) KFUPM D0 D1 D2 D3 D4 D5 D6 D7 S0 S2 S1 F(A,B,C)=(1,2,6,7) A B C F 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1
MUX-based Design (n-Select lines) KFUPM D0 D1 D2 D3 D4 D5 D6 D7 F 0 1 1 0 0 0 1 1 S0 S2 S1 A B C F(A,B,C)=(1,2,6,7) A B C F 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1
MUX-based Design (n-1 Select lines) Implement the function F(A,B,C) =(1,2,6,7) We will use 2 select lines instead of the 3 required for the three input variables A S1, B S0 The third variable C and its complement will serve as two of the inputs to the MUX KFUPM
MUX-based Design (n-1 Select lines) KFUPM A B C F 0 0 0 0 F = C 0 0 1 1 0 1 0 1 F = C 0 1 1 0 1 0 0 0 F = 0 1 0 1 0 1 1 0 1 F = 1 1 1 1 1 D0 D1 D2 D3 F S1 S0 A B C C 0 1 F(A,B,C)=(1,2,6,7)
Example 2 Implement the function F(A,B,C,D)=(1,3,4,11,12,13,14,15) We can implement this function with 3 Select lines => an 8x1 MUX is required KFUPM
Example 2 (cont.) KFUPM A B C D F 0 0 0 0 0 F = D 0 0 0 1 1 0 0 1 0 0 F = D 0 0 1 1 1 0 1 0 0 1 F = D 0 1 0 1 0 0 1 1 0 0 F = 0 0 1 1 1 0 1 0 0 0 0 F = 0 1 0 0 1 0 1 0 1 0 0 F = D 1 0 1 1 1 1 1 0 0 1 F = 1 1 1 0 1 1 1 1 1 0 1 F = 1 1 1 1 1 1 D0 D1 D2 D3 D4 D5 D6 D7 D 0 1 8x1 MUX F A B C S2 S1 S0 F(A,B,C,D)=(1,3,4,11,12,13,14,15)
DeMultiplexer Performs the inverse operation of a MUX It has one input and 2n outputs The input is passed to one of the outputs based on the n select line KFUPM 2n outputs n select lines one input 1 x 2n DeMUX
1x2 DeMUX KFUPM The circuit has an input E, the outputs are given by: D0 = E, if S=0 D0 = S E D1 = E, if S=1 D1 = S E S E 1 x 2 DeMUX D0 D1
1x4 DeMUX The circuit has an input E, the outputs are given by: D0 = E, if S0S1=00 D0 = S1S0 E D1 = E, if S0S1=01 D1 = S1S0 E D2 = E, if S0S1=10 D2 = S1S0 E D3 = E, if S0S1=11 D3 = S1S0 E KFUPM E S1 S0 D0 D1 D2 D3 1 x 4 DeMUX
DeMUX vs Decoder A 1x4 DeMUX is equivalent to a 2x4 Decoder with an Enable Think of S1S0 a the decoders input Think of E as the decoders enable In general, a DeMux is equivalent to a Decoder with an Enable KFUPM E D0 D1 D2 D3 1 x 4 DeMUX S1 S0
DeMUX vs Decoder KFUPM EN A1 A0 D0 D1 D2 D3 0 X X 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 Src: Manos book 2x4 Decoder Truth Table
DeMUX vs Decoder KFUPM EN A1 A0 D0 D1 D2 D3 0 X X 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 Src: Manos book 2x4 Decoder Truth Table To convert a 2x4 Decoder with an Enable to a 1x4 DeMux: Assign DeMuxs input (actual data) to EN Assign DeMuxs selection lines (S1,S0) to the inputs A1, A0 Data/ S1/ S0/
Summary Useful Functional Blocks Decoders Encoders Multiplexers DeMultiplexers All are examples of MSI devices Can be used to build bigger systems KFUPM
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Combinational Circuits encoders and decoders

  • 1. COE 202: Digital Logic Design Combinational Circuits Part 3 KFUPM Courtesy of Dr. Ahmad Almulhem
  • 2. Objectives Decoders Encoders Multiplexers DeMultiplexers KFUPM
  • 3. Functional Blocks Digital systems consists of many components (blocks) Useful blocks needed in many designs Arithmetic blocks Decoders Encoders Multiplexers KFUPM iPhone motherboard (torontophonerepair.com)
  • 4. Functional Blocks Digital systems consists of many components (blocks) Useful blocks needed in many designs Arithmetic blocks Decoders Encoders Multiplexers KFUPM iPhone motherboard (torontophonerepair.com) Examples of MSI devices
  • 5. Decoder Information is represented by binary codes Decoding - the conversion of an n-bit input code to an m-bit output code with n <= m <= 2n such that each valid code word produces a unique output code Circuits that perform decoding are called decoders A decoder is a minterm generator KFUPM . . . . n inputs 2n outputs n-to-2n Decoder
  • 6. Decoder (Uses) Decode a 3-bit op-codes: Home automation: KFUPM 3-to-8 Decoder Add Sub And Xor Not Load Store Jump op0 op1 op2 2-to-4 Decoder Light A/C Door Light-A/C C0 C1 Load a Add b Store c . .
  • 7. Decoder with Enable KFUPM A decoder can have an additional input signal called the enable which enables or disables the output generated by the decoder . . . 2n outputs n-to-2n Decoder Enable bit . n inputs
  • 8. 2-to-4 Decoder A 2-to-4 Decoder 2 inputs (A1, A0) 22 = 4 outputs (D3, D2, D1, D0) KFUPM
  • 9. 2-to-4 Decoder A 2-to-4 Decoder 2 inputs (A1, A0) 22 = 4 outputs (D3, D2, D1, D0) Truth Table A1 A0 D0 D1 D2 D3 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1 KFUPM
  • 10. 2-to-4 Decoder A 2-to-4 Decoder 2 inputs (A1, A0) 22 = 4 outputs (D3, D2, D1, D0) Truth Table A1 A0 D0 D1 D2 D3 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 1 Src: Manos book KFUPM
  • 11. 2-to-4 Decoder with Enable KFUPM EN A1 A0 D0 D1 D2 D3 0 X X 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 Truth Table
  • 12. 2-to-4 Decoder with Enable KFUPM EN A1 A0 D0 D1 D2 D3 0 X X 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 Src: Manos book Truth Table
  • 14. 3-to-8 Decoder KFUPM A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0 0 1 3-to-8 Decoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2
  • 16. 3-to-8 Decoder (using 2 2-to-4 decoders) KFUPM 3-to-8 Decoder 2-to-4 Decoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 2-to-4 Decoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A0 A1 A2 E E
  • 17. Decoder-Based Combinational Circuits A Decoder generates all the minterms A boolean function can be expressed as a sum of minterms Any boolean function can be implemented using a decoder and an OR gate. Note: The Boolean function must be represented as minterms (not minimized form) KFUPM
  • 18. Decoder-Based Combinational Circuits (Example) KFUPM X Y Z C S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 S = m (1,2,4,7) C = m (3,5,6,7) 3 inputs and 8 possible minterms 3-to-8 decoder can be used for implementing this circuit
  • 19. Decoder-Based Combinational Circuits (Example) KFUPM Src: Manos book X Y Z C S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 S = m (1,2,4,7) C = m (3,5,6,7) 3 inputs and 8 possible minterms 3-to-8 decoder can be used for implementing this circuit
  • 20. Decoder-Based Combinational Circuits (Summary) Good if: Many output functions with same inputs Each output has few minterms Hint: Check if the function complement has fewer minterms and use NOR instead of OR. KFUPM
  • 21. Encoder Encoding - the opposite of decoding - the conversion of an m-bit input code to a n-bit output code with n 贈 m 贈 2n such that each valid code word produces a unique output code Circuits that perform encoding are called encoders An encoder has 2n (or fewer) input lines and n output lines which generate the binary code corresponding to the input values Typically, an encoder converts a code containing exactly one bit that is 1 to a binary code corresponding to the position in which the 1 appears. . . . . n outputs 2n inputs 2n -to-n Encoder KFUPM
  • 22. 8-to-3 Encoder Description: 23 = 8 inputs, 3 outputs one input =1, others = 0s Each input generate unique binary code KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2
  • 23. 8-to-3 Encoder (truth table) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1
  • 24. 8-to-3 Encoder (truth table) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 1 0 0 0 0 0 0 0 0 0 0 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1
  • 25. 8-to-3 Encoder (truth table) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 0 1 0 0 0 0 0 0 1 0 0 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1
  • 26. 8-to-3 Encoder (truth table) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 0 0 0 0 0 1 0 0 1 0 1 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1
  • 27. 8-to-3 Encoder (truth table) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 0 0 0 0 0 0 0 1 1 1 1 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1
  • 28. 8-to-3 Encoder (equations) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 Note: This truth table is not complete! Why? Output equations: A0 = ? A1 = ? A2 = ?
  • 29. 8-to-3 Encoder (equations) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 Output equations: A0 = D1 + D3 + D5 + D7 A1 = ? A2 = ?
  • 30. 8-to-3 Encoder (equations) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 Output equations: A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = ?
  • 31. 8-to-3 Encoder (equations) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 Output equations: A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = D4 + D5 + D6 + D7
  • 32. 8-to-3 Encoder (circuit) KFUPM 8-to-3 Encoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 Output equations: A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = D4 + D5 + D6 + D7 A0 A1 A2 D1 D3 D5 D7 D2 D3 D6 D7 D4 D5 D6 D7
  • 33. 8-to-3 Encoder (limitations) KFUPM Output equations: A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = D4 + D5 + D6 + D7 inputs outputs D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1 Two Limitations: 1. Two or more inputs = 1 Example: D3 = D6 = 1 A2A1A0 = 111 2. All inputs = 0 Same as D0 =1
  • 34. Priority Encoder Address the previous two limitations 1. Two or more inputs = 1 Consider the bit with highest priority 2. All inputs = 0 Add another output v to indicate this combination KFUPM
  • 35. 4-to-2 Priority Encoder KFUPM Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1s take highest priority
  • 36. 4-to-2 Priority Encoder KFUPM inputs outputs D3 D2 D1 D0 A1 A0 V 0 0 0 0 X X 0 0 0 0 1 0 0 1 0 0 1 X 0 1 1 0 1 X X 1 0 1 1 X X X 1 1 1 Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1s take highest priority This is a condensed truth table! It has only 5 rows instead of 16! Row 3 = 2 combinations Row 4 = 4 combinations Row 5 = 8 combinations
  • 37. 4-to-2 Priority Encoder KFUPM inputs outputs D3 D2 D1 D0 A1 A0 V 0 0 0 0 X X 0 0 0 0 1 0 0 1 0 0 1 X 0 1 1 0 1 X X 1 0 1 1 X X X 1 1 1 Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1s take highest priority
  • 38. 4-to-2 Priority Encoder KFUPM inputs outputs D3 D2 D1 D0 A1 A0 V 0 0 0 0 X X 0 0 0 0 1 0 0 1 0 0 1 X 0 1 1 0 1 X X 1 0 1 1 X X X 1 1 1 Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1s take highest priority Equations: A0 = D3 + D1 D2 A1 = D2 + D3 V = D0 + D1 + D2 + D3
  • 39. 4-to-2 Priority Encoder KFUPM inputs outputs D3 D2 D1 D0 A1 A0 V 0 0 0 0 X X 0 0 0 0 1 0 0 1 0 0 1 X 0 1 1 0 1 X X 1 0 1 1 X X X 1 1 1 Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1s take highest priority Equations: A0 = D3 + D1 D2 A1 = D2 + D3 V = D0 + D1 + D2 + D3
  • 40. Multiplexers A combinational circuit Has a single output Directs one of 2n input to the output Choosing which input is done using n select lines KFUPM 2n inputs n select lines one output 2n x 1 MUX
  • 41. 2x1 MUX A 2x1 multiplexer (MUX) has 2 inputs, 1 output and 1 select line Y=D0 for S0=0, and Y=D1 for S0=1 Minimizing will result in: Y = S0.D0 + S0.D1 Exercise: Draw the circuit? KFUPM S0 D0 D1 Y 2x1 MUX
  • 42. 2x1 MUX A 2x1 multiplexer (MUX) has 2 inputs, 1 output and 1 select line Y=D0 for S0=0, and Y=D1 for S0=1 Minimizing will result in: Y = S0.D0 + S0.D1 Exercise: Draw the circuit? KFUPM S0 D0 D1 Y 2x1 MUX
  • 43. 4x1 MUX A 4x1 MUX has 4 input lines (D0, D1, D2, D3) , 1 output Y, and 2 Select Lines (S0, S1) The output for different select values is defined as: S0S1 = 00, Y = D0 S0S1 = 01, Y = D1 S0S1 = 10, Y = D2 S0S1 = 11, Y = D3 Y = S1S0D0 + S1S0D1 + S1S0D2 + S1S0D3 The output Y depends on the minterms of the Select lines Exercise: Draw the circuit? KFUPM S1 S0 D0 D1 D2 D3 Y 4x1 MUX
  • 44. 4x1 MUX A 4x1 MUX has 4 input lines (D0, D1, D2, D3) , 1 output Y, and 2 Select Lines (S0, S1) The output for different select values is defined as: S0S1 = 00, Y = D0 S0S1 = 01, Y = D1 S0S1 = 10, Y = D2 S0S1 = 11, Y = D3 Y = S1S0D0 + S1S0D1 + S1S0D2 + S1S0D3 The output Y depends on the minterms of the Select lines Exercise: Draw the circuit? KFUPM S1 S0 D0 D1 D2 D3 Y 4x1 MUX
  • 45. Quad 2x1 MUX A MUX for two 4-bit numbers. Has a 4-bit output and a single select line Y = A If S0 = 0 Y = B if S0 = 1 KFUPM S0 A0 A1 A2 A3 B0 B1 B2 B3 Y0 Y1 Y2 Y3 QUAD 2X1 MUX
  • 46. Quad 2x1 MUX Can be built using four 2x1 MUXes KFUPM S0 A0 B0 Y0 2x1 MUX S0 A2 B2 Y2 2x1 MUX S0 A1 B1 Y1 2x1 MUX S0 A3 B3 Y3 2x1 MUX
  • 47. MUX-based Design A MUX can be used to implement any function expressed using its minterms Example: Implement F(A,B,C)=(1,2,6,7) using MUXes Solution1: We can use a MUX with the number of select lines equal to the number of input variables of the function. Since this function has 3 input variables, it will require 3 select lines, i.e. an 8x1 MUX KFUPM
  • 48. MUX-based Design (n-Select lines) KFUPM F(A,B,C)=(1,2,6,7) A B C F 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1
  • 49. MUX-based Design (n-Select lines) KFUPM D0 D1 D2 D3 D4 D5 D6 D7 S0 S2 S1 F(A,B,C)=(1,2,6,7) A B C F 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1
  • 50. MUX-based Design (n-Select lines) KFUPM D0 D1 D2 D3 D4 D5 D6 D7 F 0 1 1 0 0 0 1 1 S0 S2 S1 A B C F(A,B,C)=(1,2,6,7) A B C F 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1
  • 51. MUX-based Design (n-1 Select lines) Implement the function F(A,B,C) =(1,2,6,7) We will use 2 select lines instead of the 3 required for the three input variables A S1, B S0 The third variable C and its complement will serve as two of the inputs to the MUX KFUPM
  • 52. MUX-based Design (n-1 Select lines) KFUPM A B C F 0 0 0 0 F = C 0 0 1 1 0 1 0 1 F = C 0 1 1 0 1 0 0 0 F = 0 1 0 1 0 1 1 0 1 F = 1 1 1 1 1 D0 D1 D2 D3 F S1 S0 A B C C 0 1 F(A,B,C)=(1,2,6,7)
  • 53. Example 2 Implement the function F(A,B,C,D)=(1,3,4,11,12,13,14,15) We can implement this function with 3 Select lines => an 8x1 MUX is required KFUPM
  • 54. Example 2 (cont.) KFUPM A B C D F 0 0 0 0 0 F = D 0 0 0 1 1 0 0 1 0 0 F = D 0 0 1 1 1 0 1 0 0 1 F = D 0 1 0 1 0 0 1 1 0 0 F = 0 0 1 1 1 0 1 0 0 0 0 F = 0 1 0 0 1 0 1 0 1 0 0 F = D 1 0 1 1 1 1 1 0 0 1 F = 1 1 1 0 1 1 1 1 1 0 1 F = 1 1 1 1 1 1 D0 D1 D2 D3 D4 D5 D6 D7 D 0 1 8x1 MUX F A B C S2 S1 S0 F(A,B,C,D)=(1,3,4,11,12,13,14,15)
  • 55. DeMultiplexer Performs the inverse operation of a MUX It has one input and 2n outputs The input is passed to one of the outputs based on the n select line KFUPM 2n outputs n select lines one input 1 x 2n DeMUX
  • 56. 1x2 DeMUX KFUPM The circuit has an input E, the outputs are given by: D0 = E, if S=0 D0 = S E D1 = E, if S=1 D1 = S E S E 1 x 2 DeMUX D0 D1
  • 57. 1x4 DeMUX The circuit has an input E, the outputs are given by: D0 = E, if S0S1=00 D0 = S1S0 E D1 = E, if S0S1=01 D1 = S1S0 E D2 = E, if S0S1=10 D2 = S1S0 E D3 = E, if S0S1=11 D3 = S1S0 E KFUPM E S1 S0 D0 D1 D2 D3 1 x 4 DeMUX
  • 58. DeMUX vs Decoder A 1x4 DeMUX is equivalent to a 2x4 Decoder with an Enable Think of S1S0 a the decoders input Think of E as the decoders enable In general, a DeMux is equivalent to a Decoder with an Enable KFUPM E D0 D1 D2 D3 1 x 4 DeMUX S1 S0
  • 59. DeMUX vs Decoder KFUPM EN A1 A0 D0 D1 D2 D3 0 X X 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 Src: Manos book 2x4 Decoder Truth Table
  • 60. DeMUX vs Decoder KFUPM EN A1 A0 D0 D1 D2 D3 0 X X 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1 1 0 0 0 1 Src: Manos book 2x4 Decoder Truth Table To convert a 2x4 Decoder with an Enable to a 1x4 DeMux: Assign DeMuxs input (actual data) to EN Assign DeMuxs selection lines (S1,S0) to the inputs A1, A0 Data/ S1/ S0/
  • 61. Summary Useful Functional Blocks Decoders Encoders Multiplexers DeMultiplexers All are examples of MSI devices Can be used to build bigger systems KFUPM
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