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HARISHANKAR.P
Contact No. : 09971378021 | Email Id : shankars.corner@gmail.com
CARRER OBJECTIVES:
I would like to obtain a position that utilizes and further develops each of my skills and will allow me to
work my way up into a position of more responsibility.
ACADEMIC PROFILE:
Degree/Certificate University/Board Year of passing Percentage/CGPA
M.Tech
(Microelectronics)
Manipal University
Jaipur 2014 8.84 CGPA
B.Tech
(Electronics &
communication)
Kerala University
2010 7.23GPA
12th
CBSE
2006 73%
10th
CBSE
2004 89.6%
TECHNICAL SKILLS:
HDLs & HVLs : Verilog, System Verilog
Scripting Languages : Shell, Tcl/Tk
Simulation & Synthesis : Modelsim, Questa , Xilinx Tool (Xilinx ISE)
Operating Systems : Linux, Windows
AREA OF INTEREST
 Digital Electronics, CMOS, RTL Coding.
ASIC VERIFICATION TRAINING:
DKOP LABS PRIVATE LIMITED, NOIDA Jun 2013 Present
 ASIC Verification Projects :
o PROJECT 1: Two stage PIPELINED DUT
 It consists of a two stage pipeline that consists of an Execute preprocessor and an ALU
 The test bench is explicitly layered and objects oriented and its checking is
performed using probes into the internals of the DUT and performs checking using a
pipelined approach.
PROFESSIONAL EXPERIENCE:
COOLJUNK TECHNOLOGIES PVT. LTD. May 2015 -Present
 Position Technical Intern.
o Responsible for conducting workshops on behalf of the company in various schools across NCR
region.
ACADEMIC PROJECTS:
 M.TECH DISSERTATION WORK:
o DESIGN OF EFFICIENT FSM FOR MASTER AND SLAVE INTERFACE IN AMBA AHB
 Dissertation work deals with the study of AMBA AHB 2 standard, its Design by designing better
FSM for master and slave interface.
 Synthesis of the design and White box verification of the designed system with the help of
System Verilog.
 The Designed system consists of 4 split and retry capable masters and slaves along with an
Arbiter module a decoder module and 5 backbone mux units.
 B.TECH FINAL YEAR MAJOR PROJECT:
o EXPLOROBOT
 A robot vehicle which can be controlled via a laptop interface, utilizing Zigbee Protocol.
 Having a webcam mounted, it has a 180 degree field of vision, and a robotic arm to pick up
samples.
 The main idea of this project is to develop a robot that could explore places where human
presence is restricted.
 B.TECH MINI PROJECT:
o ELOCK
 In todays world safety and security are given huge priority, keeping this in mind we designed an
electronic lock which can be activated using your normal every day mobile phone.
PUBLICATIONS:
P.Harishankar, Mr.Chusen Duari, Mr. Ajay Sharma Design and Synthesis of Efficient FSM for Master and Slave
Interface in AMBA AHB INTERNATIONAL JOURNEL OF ENGINEERING DEVELOPMENT AND RESEARCH (IJEDR)
Published In E-Journal Volume 2 Issue 3 PAPER ID: IJEDR1403042
EXTRA - CURRICULAR ACTIVITIES:
 Member of TOASTMASTERS INTERNATIONAL CLUB, Noida.
 Winner of ALL INDIA CAMEL COLORING CONTEST sub juniors
 Member of Organizing committee of (LMCST)college fest AUDAX 09
 Winner of painting contest held during Cultural Fest (LMCST).
PERSONAL DETAILS
Date of Birth: 13th
JUNE 1989|Languages: English, Hindi, and Malayalam |GENDER: Male | Marital Status: Single
HARISHANKAR.P

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HARISHANKAR.P resume

  • 1. HARISHANKAR.P Contact No. : 09971378021 | Email Id : shankars.corner@gmail.com CARRER OBJECTIVES: I would like to obtain a position that utilizes and further develops each of my skills and will allow me to work my way up into a position of more responsibility. ACADEMIC PROFILE: Degree/Certificate University/Board Year of passing Percentage/CGPA M.Tech (Microelectronics) Manipal University Jaipur 2014 8.84 CGPA B.Tech (Electronics & communication) Kerala University 2010 7.23GPA 12th CBSE 2006 73% 10th CBSE 2004 89.6% TECHNICAL SKILLS: HDLs & HVLs : Verilog, System Verilog Scripting Languages : Shell, Tcl/Tk Simulation & Synthesis : Modelsim, Questa , Xilinx Tool (Xilinx ISE) Operating Systems : Linux, Windows AREA OF INTEREST Digital Electronics, CMOS, RTL Coding. ASIC VERIFICATION TRAINING: DKOP LABS PRIVATE LIMITED, NOIDA Jun 2013 Present ASIC Verification Projects : o PROJECT 1: Two stage PIPELINED DUT It consists of a two stage pipeline that consists of an Execute preprocessor and an ALU The test bench is explicitly layered and objects oriented and its checking is performed using probes into the internals of the DUT and performs checking using a pipelined approach.
  • 2. PROFESSIONAL EXPERIENCE: COOLJUNK TECHNOLOGIES PVT. LTD. May 2015 -Present Position Technical Intern. o Responsible for conducting workshops on behalf of the company in various schools across NCR region. ACADEMIC PROJECTS: M.TECH DISSERTATION WORK: o DESIGN OF EFFICIENT FSM FOR MASTER AND SLAVE INTERFACE IN AMBA AHB Dissertation work deals with the study of AMBA AHB 2 standard, its Design by designing better FSM for master and slave interface. Synthesis of the design and White box verification of the designed system with the help of System Verilog. The Designed system consists of 4 split and retry capable masters and slaves along with an Arbiter module a decoder module and 5 backbone mux units. B.TECH FINAL YEAR MAJOR PROJECT: o EXPLOROBOT A robot vehicle which can be controlled via a laptop interface, utilizing Zigbee Protocol. Having a webcam mounted, it has a 180 degree field of vision, and a robotic arm to pick up samples. The main idea of this project is to develop a robot that could explore places where human presence is restricted. B.TECH MINI PROJECT: o ELOCK In todays world safety and security are given huge priority, keeping this in mind we designed an electronic lock which can be activated using your normal every day mobile phone. PUBLICATIONS: P.Harishankar, Mr.Chusen Duari, Mr. Ajay Sharma Design and Synthesis of Efficient FSM for Master and Slave Interface in AMBA AHB INTERNATIONAL JOURNEL OF ENGINEERING DEVELOPMENT AND RESEARCH (IJEDR) Published In E-Journal Volume 2 Issue 3 PAPER ID: IJEDR1403042 EXTRA - CURRICULAR ACTIVITIES: Member of TOASTMASTERS INTERNATIONAL CLUB, Noida. Winner of ALL INDIA CAMEL COLORING CONTEST sub juniors Member of Organizing committee of (LMCST)college fest AUDAX 09 Winner of painting contest held during Cultural Fest (LMCST). PERSONAL DETAILS Date of Birth: 13th JUNE 1989|Languages: English, Hindi, and Malayalam |GENDER: Male | Marital Status: Single HARISHANKAR.P