Megha Dogra1
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This document is Megha Dogra's resume. It summarizes her education and qualifications. She is currently pursuing an M.Tech in VLSI Design from Sathyabama University in Chennai, India, with an expected graduation date of June 2016. She has technical skills in programming languages like Verilog and VHDL, as well as VLSI EDA tools. She has worked on academic projects related to designing a humidity sensor using MEMS technology and a less delay multiplier using Vedic mathematics.
Megha Dogra1
- 1. Megha Dogra M.Tech (VLSI Design), Department of Electronics and Electrical Engineering, Sathyabama University Chennai (Expected: June 2016), Email: meghaadograa@gmail.com Linkedin: http://in.linkedin.com/in/megha-dogra-017956b5 Ph: (Cell) +91-944976820 Objective: To excel in the field of VLSI and make a steady progress by constantly updating my knowledge and enhancing my practical skills, so that I become a better engineer everyday and hence my knowledge used to society. Education: M. Tech(VLSI Design) 2014-2016 Sathyabama University Chennai CGPA: 8.6/10 (Upto March 2016) B.Tech (Electronics and Communication Engineering) 2009-2013 Sri Sai College of Engineering & Technology ,Badhani, Pathankot Percentage- 83.5% HSC (2009) DAV School Baghni , Kangra (Himachal Pradesh) Percentage: 76.8% SSC (2007) Govt. High School Nainikhad (Himachal Pradesh) Percentage: 82% Technical Skills: Programming: Verilog, VHDL, C, Cisco Packet tracer. VLSI EDA TOOLS: P-spice, Xilinx ISE and Modelsim. PHYSICS CAD: COMSOL Multiphysics. Academic Projects: M. Tech (VLSI Design) 1) Design and Analysis of Humidity Sensor Using MEMS (In progress): This project involves Fabrication of Humidity Sensor using MEMS technology. Humidity Sensor plays a vital role not only in industry and also for Human Comfort. Sensor Model has been designed and analyzed using COMSOL Multiphysics 4.3b software. Micro electromechanical system is new emerging technology which helps in making cost effective and reliable sensor. For fabrication of device first synthesis of material has been done. The fabrication of Device is done at International Research Centre of Sathyabama University Chennai. 2) Design ofLess delay Multiplier Using Vedic Mathematics: Aim of this project is to design a multiplier and compare with existing multiplier in the Delay analysis .The design was done using Verilog code in Xilinx Spartan-3 and Modelsim. 3) Performance analysis of Multiplier using Microwind layout and Xilinx: Aim of this project is modify the existing CLSA (Carry Select adder) adder in Vedic Multiplier block
- 2. using Multiplexer and checked its performance with existing multiplier .The Multiplier was designed using Verilog Code and with Xilinx code and Modelsim. B.Tech (ECE) 1) NETWORK CONFIGURATION AND MANAGEMENT: In this project One global network is established between 3 companies of different location in INDIA has been established using CISCO Packet tracer and each company was connected through VLAN , each VLAN connection is through VTP. RIP2 protocol used for VLAN communication and for global communication, Traffic filtration FRAME RELAY and ACL is used. TECHNICAL ACTIVITIES Attended 2 months training in ``Networking in CDAC Mohali July, 2011. Attended 6 months training in NIIT DELHI in Managing Interconnected Network Devices on 2013. Summer internship in MEMS AND MICROFLUIDS of REC, Thandalam, Chennai on June 2015. Published a Magazine in 3rd Semester of M.Tech, Worked as a Co-coordinator of the Magazine Catalyst on November 2015. Attended workshop on Vedic Mathematics in Engineering Applications 2015. Attended NANOTECHNOLOGY WORKSHOP in IISC Bangalore 16/17 October 2015. Going to publish paper on the topics A Study of Humidity Sensor, Design and Analysis of Humidity Sensor using MEMS, Design of Less Delay Multiplier using Vedic Mathematics on IEEE Conference Coimbatore March 2016. CO-CURRICULAR ACTIVITIES Secured state level position in Dancing, Debate. Best Student Award by Education Minister of Himachal Pradesh. Lead the ECO club as a Captain and Organized farewell function in college. Appreciated with Scholarship from HPSEB BOARD in 5th , 8th &in 10th . Secured 57th Position in HPSEB during 10th class. Got trained under Unarmed Combat Training by Himachal Pradesh Police under Samarth Yojna, 2004. Personal Details: Date of Birth: 22 December 1992 Permanent Address: Village and PO, Kandwal, District Kangra, Teh. Nurpur, Himachal Pradesh 176201 Language Known: Speak: English, Hindi, Punjabi, Himachali, Dogri Write: English, Hindi Declaration: I hereby declare that the particular information of details furnished above is true to the best of my knowledge and brief. MEGHA DOGRA