Kts c5-pld
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This document discusses programmable logic devices (PLDs). It describes the basic structures of read-only memory (ROM) and introduces different types of PLDs including programmable logic array (PLA) and programmable array logic (PAL). The key characteristics of PLA and PAL are explained such as their configurable AND/OR arrays and how they can be programmed to implement different logic functions. Examples of 3-input PLA and PAL structures and their truth tables are also provided.
Kts c5-pld
- 1. PLD THI?T B? LOGIC L?P TR?NH ???C (Programmable Logic Device) NguyenTrongLuat 1
- 2. BO? NH?? BA?N DA?N Bo? nh?¨´ ba¨´n da?n Bo? nh?¨´ ba?ng Bo? nh?¨´ ha?m RAM ROM t¨®nh ?o?ng MROM PROM EPROM EEPRO M PLD PLAPALLCA PPA LEPLPA LEEPPAL EPL D PEELGAL NguyenTrongLuat 2
- 3. BO? NH?? ROM Input: ca¨´c t¨ªn hie?u ?¨°a ch? (Address) Output: ca¨´c t¨ªn hie?u d?? lie?u (Data) A0 A1 An-1 D0 D1 Dm-1 INPUT (n ????ng) OUTPUT (m ????ng) K¨ªch th??¨´c ROM: 2n x m (bit) NguyenTrongLuat 3
- 4. word line bit line 101 1 0 1 1 1 1 1 0 1 1 1 Ba?ng na?p ROM A2 A1 0 1 0 0 A0 D3 D2 D1 0 0 D0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 1 1 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 Ca¨¢u tru¨´c no?i ROM 8 x 4 (bit) 1 NguyenTrongLuat 4
- 5. ROM 128 x 1 (bit) gia?i ma? 2 chie¨¤u NguyenTrongLuat 5
- 6. ROM 32K x 8 (bit) = 32KB NguyenTrongLuat 6
- 7. Ca¨¢u tru¨´c ROM co¨´ ngo? va?o ?ie¨¤u khie?n NguyenTrongLuat 7
- 8. Co?ng ?e?m ba tra?ng tha¨´i (Tristate Output Buffer): 3 tra?ng tha¨´i (tristate): LOW / HIGH / HIGH impedance Tra?ng tha¨´i to?ng tr?? cao (HIGH impedance): ngo? ra h?? ma?ch - Ngo? ?ie¨¤u khie?n 3 tra?ng tha¨´i: * HIGH: The buffer is Active * LOW: HIGH impedance NguyenTrongLuat 8
- 9. Ca¨´c EPROM tho?ng du?ng NguyenTrongLuat 9
- 10. PLA (PROGRAMMABLE LOGIC ARRAY) INPUT (n bit) OUTPUT (m bit) k product term (so¨¢ ha?ng t¨ªch) Da?y AND Da?y OR NguyenTrongLuat 10
- 11. Da?y AND co¨´ the? la?p tr¨¬nh Da?y OR co¨´ the? la?p tr¨¬nh NguyenTrongLuat 11
- 12. A Ca¨¢u tru¨´c PLA 3 x 2, 4 so¨¢ F1 = A B + A C + A B CF2 = A C + B C 0 1 ha?ng t¨ªch B C C C B B A A A B A C B C A B C F1 F2 Ba?ng na?p PLA A B C F2 (C) F1 (T) 1 0 - A B A C 1 - B C 1- 1 A B 1 C 0 1 0 0 11 11 00 NguyenTrongLuat 1 12
- 13. PAL (PROGRAMMABLE ARRAY LOGIC ) - Da?y AND la?p tr¨¬nh, da?y OR co¨¢ ?¨°nh - Mo?i ngo? ra la? co?ng OR co¨´ so¨¢ ngo? va?o co¨¢ ?¨°nh - So¨¢ ha?ng t¨ªch kho?ng s?? du?ng chung cho ca¨´c ngo? ra - Ca¨¢u tru¨´c PLA: so¨¢ ngo? va?o, so¨¢ ngo? ra va? so¨¢ co?ng AND tre?n 1 co?ng OR NguyenTrongLuat 13
- 14. Ca¨¢u tru¨´c PAL 3 ngo? va?o, 3 ngo? ra, 3 co?ng AND / OR 1 2 3 4 5 6 7 8 9 I1 I2 I3 F1 F2 F3 NguyenTrongLuat 14
- 15. A 1 2 3 4 5 6 7 8 9 B C X Y Z A A B B C C X X X = A B + B C Z = A B + B C + B C + A C Y = A + B C = X + B C + A C NguyenTrongLuat 15
- 16. X = A B + B C Z = A B + B C + B C + A C Y = A + B C = X + B C + A C Ba?ng na?p PAL A B C X OUTPUT X = A B + B C 1 1 1 1 0 Y = A 0 0 + B C Z = X 1 0 0 + B C 0 1 + A C 1 2 3 4 56 7 8 9 NguyenTrongLuat 16