I have completed M.tech in VLSI (ELECTRONICS) from Amity University with 8.45 CGPA.
VLSI Programming Languages : VHDL, Verilog HDL, VHDL-AMS.
Layout Tools : Modelsim SE 6.2b
CADENCE (Virtuoso),Mentorgraphics(eldonet), Pspice, tanner.
VLSI Programming Tools : Xillinx 13.1
FPGA : Spartan-3E, Vertex-5.
Languages : C,
Good programming concepts.
Experienced in VHDL, Verilog, Xilinx Spartan FPGA programming.
Expertise in Digital Design and Advanced Verification Techniques
Proficient in RTL design, simulation and synthesis using Xilinx ISE, XST tools.
Experienced with Xilinx EDK Platform.
Experience in Simulation, Synthesis, MAP and Place & Route.
Knowledgeable in Physical design flow.
Knowl...
We鈥檝e updated our privacy policy so that we are compliant with changing global privacy regulations and to provide you with insight into the limited ways in which we use your data.
You can read the details below. By accepting, you agree to the updated privacy policy.
